This course will be delivered as an ONLINE COURSE for remote participation because of the COVID-19 measures enforced by most European governments.

REGISTRATION is strictly NECESSARY since the details to access the online course will be provided to the registered and accepted attendees only.

As the lecturer is teaching from the West Coast of the USA, we had to shift the course to 15:00 - 19:00 CET.

FPGAs can help accelerate many of the core data center workloads that process the growing volume of data that our hyper-connected world creates. They can be reprogrammed in a fraction of a second with a datapath that exactly matches your workload’s key algorithms. This versatility results in a higher performing, more power efficient, and well utilized data center – lowering your total cost of ownership. FPGAS can be connected directly to processors, memories, networks, and numerous other interfaces. Traditionally, FPGAs require deep domain expertise to program for, but Intel is investing in significantly simplifying the development flow and enable rapid deployment across the data center.

This course offered by Intel in cooperation with LRZ gives a high-level overview of FPGAs, what they are, why they are so important as accelerators, and how they can be programmed using OpenCL.  This course contains both lecture and lab exercises to help gain familiarity with OpenCL Programming for Intel FPGAs.

Agenda

23 April 2020, 15:00-19:00: Introduction to OpenCL Programs for Intel FPGAs, Part I

24 April 2020, 14:00-15:00: Ask Intel Webex Session

24 April 2020, 15:00-19:00: Introduction to OpenCL Programs for Intel FPGAs, Part II

The OpenCL™ standard is a standard for writing parallel programs for heterogeneous systems. With the Intel® FPGA SDK for OpenCL™ software technology, OpenCL program constructs are synthesized into custom logic for optimal acceleration on FPGA devices. This lecture introduces the basic concepts of parallel computing. It covers the constructs of the OpenCL standard and the Intel FPGA design flow that automatically convert kernel C code into hardware that interacts with the host. In hands-on labs, you’ll write programs to run in the Intel FPGA Emulation Platform for OpenCL™ software.

OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.

After this lecture you will be able to:

• Describe high-level parallel computing concepts and challenges
• Understand the advantages of using OpenCL applications on Intel FPGAs
• Know the basics of the OpenCL standard
• Write simple OpenCL programs
• Compile, debug, and run OpenCL programs using the Intel FPGA SDK for OpenCL software technology

The following content will be offered in a separate online course (tbd):

Optimizing OpenCL Programs for Intel FPGAs

This lecture covers optimization techniques to implement high performance OpenCL™ applications on FPGAs. We'll use various debug & analysis tools available in the Intel® FPGA SDK for OpenCL™ software technology to boost performance of OpenCL kernels. The first half of the lecture focuses on the optimization of single work-item kernels & the utilization of channel constructs & OpenCL kernel pipes. The second half of the lecture focuses on the optimization of NDRange kernels & the effective utilization of FPGA memory resources. Throughout the lecture we will discuss good coding practices for FPGAs & tool features to improve OpenCL kernel performance on FPGAs.

After this lecture you will be able to:

• Use debugging & optimization tools
• Execute multiple OpenCL kernels in a task parallel fashion
• Boost performance of single work-item kernels
• Use single work-item kernels to implement parallel programming algorithms
• Use channels or OpenCL kernel pipes to increase communication performance
• Boost performance of NDRange kernels
• Improve usage of memory architectures
• Improve host-device communication efficiency
• Use good coding practices
• Boost data processing efficiency

Please use your own laptop (with an ssh client installed) for the hands-on sessions!