2018-04-23 PRACE Workshop: VI-HPS Tuning Workshop

Sponsor

Goals

This workshop organized by VI-HPS, LRZ & IT4Innovations as a PRACE training event will:

• give an overview of the VI-HPS programming tools suite
• explain the functionality of individual tools, and how to use them effectively
• offer hands-on experience and expert assistance using the tools

Programme Overview

Presentations and hands-on sessions are planned on the following topics:

• Setting up, welcome and introduction
• mpiP lightweight MPI profiling
• MAQAO performance analysis & optimisation
• Score-P instrumentation and measurement
• Extra-P automated performance modeling
• Scalasca automated trace analysis
• Vampir interactive trace analysis
• Paraver/Extrae/Dimemas trace analysis and performance prediction
• JUBE script-based workflow execution environment
• Periscope/PTF automated performance analysis and optimisation
• TAU performance system
• MUST runtime error detection for MPI
• ARCHER runtime error detection for OpenMP
• [k]cachegrind cache utilisation analysis

A brief overview of the capabilities of these and associated tools is provided in the VI-HPS Tools Guide.

The workshop will be held in English and run from 09:00 to not later than 18:00 each day, with breaks for lunch and refreshments. For participants from public research institutions in PRACE countries, the course fee is sponsored through the PRACE PATC program. All participants are responsible for their own travel and accommodation.

A social event for participant and instructor networking is planned for the evening on Tuesday 24 April, consisting of a guided tour of the Weihenstephan Brewery followed by a self-paid dinner at the brewery restaurant.

Classroom capacity is limited, therefore priority may be given to applicants with parallel codes already running on the workshop computer system (CooLMUC3), and those bringing codes from similar Xeon Phi x86 cluster systems to work on. Participants are therefore encouraged to prepare their own MPI, OpenMP and hybrid MPI+OpenMP parallel application codes for analysis.

Programme in Detail (provisional)

Hardware and Software Platforms

CooLMUC3: KNL-based x86 Linux cluster system:

• 148 compute nodes each with single Intel Xeon Phi 7210-F 'Knights Landing' MIC processors (1.3GHz, 64 cores per processor, 4 hardware threads per core) and 96GB RAM and 16GB HBM
• cluster modes: quad, snc4, a2a
• memory modes: flat, cache, hybrid
• network: Intel OmniPath interconnect
• parallel filesystem: GPFS (SCRATCH & WORK)
• software: SLES12-based GNU/Linux, Intel MPI; Intel, GCC and other compilers; SLURM batchsystem

The local HPC system CooLMUC3 is the primary platform for the workshop and will be used for the hands-on exercises. Course accounts will be provided during the workshop to participants without existing accounts. Other systems where up-to-date versions of the tools are installed can also be used when preferred, though support may be limited and participants are expected to already possess user accounts on non-local systems. Regardless of whichever systems they intend to use, participants should be familiar with the relevant procedures for compiling and running their parallel applications (via batch queues where appropriate).

RNDr. Ondřej Jakl, CSc. (IT4Innovations), Dr. Volker Weinberg (LRZ), Brian Wylie (JSC)